Implementation of ITER Fast Plant Interlock System Using FPGAs with cRIO

by Eduardo Barrera, Mariano Ruiz, Alvaro Bustos, Mehdi Afif, Byron Radle, Juan Luis Fernandez-Hernando, Ignacio Prieto, Riccardo Pedica, Miguel Barcala, Juan Carlos Oller, Rodrigo Castro
Reference:
Implementation of ITER Fast Plant Interlock System Using FPGAs with cRIO (Eduardo Barrera, Mariano Ruiz, Alvaro Bustos, Mehdi Afif, Byron Radle, Juan Luis Fernandez-Hernando, Ignacio Prieto, Riccardo Pedica, Miguel Barcala, Juan Carlos Oller, Rodrigo Castro), In 2016 IEEE-NPSS REAL TIME CONFERENCE (RT), 2016. (IEEE-NPSS Real Time Conference (RT), ITALY, JUN 06-10, 2016)
Bibtex Entry:
@inproceedings{ ISI:000389775600025,
Author = {Barrera, Eduardo and Ruiz, Mariano and Bustos, Alvaro and Afif, Mehdi
   and Radle, Byron and Fernandez-Hernando, Juan Luis and Prieto, Ignacio
   and Pedica, Riccardo and Barcala, Miguel and Carlos Oller, Juan and
   Castro, Rodrigo},
Book-Group-Author = {{IEEE}},
Title = {{Implementation of ITER Fast Plant Interlock System Using FPGAs with cRIO}},
Booktitle = {{2016 IEEE-NPSS REAL TIME CONFERENCE (RT)}},
Year = {{2016}},
Note = {{IEEE-NPSS Real Time Conference (RT), ITALY, JUN 06-10, 2016}},
Organization = {{IEEE NPPS}},
ISBN = {{978-1-5090-2014-0}},
ResearcherID-Numbers = {{Barrera, Eduardo/H-4196-2011
   Barcala, JOSE MIGUEL/I-1105-2015}},
ORCID-Numbers = {{Barrera, Eduardo/0000-0001-7197-8821
   Barcala, JOSE MIGUEL/0000-0002-1092-7091}},
Unique-ID = {{ISI:000389775600025}},
}